1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method for the semiconductor device, and more specifically to a power MOSFET of a super-junction structure and a trench-gate structure.
2. Description of Related Art
In recent years, power components such as a power MOSFET (metal oxide semiconductor field effect transistor) have required a higher element breakdown voltage. A vertical power MOSFET has been widely used out as the power MOSFET. Japanese unexamined patent application publication No. 2002-368221 and Japanese unexamined patent application publication No. 2002-373988 disclose a conventional vertical power MOSFET. Up to now, the vertical power MOSFET adopts the trench-gate structure having a gate electrode formed in a trench for lowering an on-resistance super-junction structure or super-junction structure for realizing both the low on-resistance and high breakdown voltage. Further, Japanese unexamined patent application publication No. 2002-184985 discloses the technique of improving a breakdown voltage of the element by forming the super-junction structure even around the element. The super-junction structure is secured even around the element, so a depletion layer formed around the element expands to increase the breakdown voltage of the element.
FIGS. 3A and 3B show the element structure of a conventional typical vertical power MOSFET. In general, the vertical power MOSFET has a polysilicon layer 301 for forming a gate electrode on its periphery A heat treatment step is necessary for forming the gate electrode inclusive of the polysilicon layer 301. A column region 104 is generally formed through thermal diffusion. Thus, in the case where the column region 104 is formed before the formation of the gate electrode including the polysilicon layer 301, the heat treatment for the formation of the gate electrode including the polysilicon layer 301 induces the thermal diffusion of the column region 104. As a result, the element cannot be finely formed. In order to prevent the thermal diffusion of the column region 104 from proceeding, the column region 104 is formed after the formation of the gate electrode including the polysilicon layer 301. In this case, in the polysilicon layer 301 and its surrounding areas, ion implantation for forming the column region is hindered by the polysilicon layer 301. Hence, the column region 104 cannot be formed with sufficient depth. Therefore, the column region 104 is shallower under the polysilicon layer than other regions. That is, the uniform super-junction structure cannot be formed. The depth of the column region 104 in an element active portion is different from the depth of the column region 104 in the outer peripheral portions. As a result, the balance of charges between the element active portion and the outer peripheral portion is upset, making it difficult to improve the breakdown voltage of the element. Japanese unexamined patent application publication No. 2002-184985 discloses the structure where the column region has the uniform depth at the element active portion and the outer peripheral portion, but describes no structure for extracting a gate electrode.